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  october 2012 doc id 023156 rev 1 1/39 AN4106 application note evlvip26l-12wfn: 12 v/12 w, 60 khz non-isolated flyback by mirko sciortino introduction this document describes a 12 v-1 a power supply set in non-isolated flyback topology with the viper26, a new offline high-voltage converter by stmicroelectronics. the features of the device include an 800 v avalanche rugged power section, pwm operation at 60 khz with frequency jittering for lower emi, current limiting with adjustable set point, onboard soft-start, a safe auto-restart after a fault condition and low standby power. the available protection includes thermal shutdown with hysteresis, delayed overload protection, and open loop failure protection. all protection is auto-restart mode. figure 1. evlvip26l-12wfn demonstration board evlvip26l-12wfn www.st.com
contents AN4106 2/39 doc id 023156 rev 1 contents 1 adapter features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 testing the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 typical waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 line/load regulation and output voltage ripple . . . . . . . . . . . . . . . . . . 14 7 burst mode and output voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 light load performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 functional check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.1 soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.2 overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10.3 feedback loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 11 feedback loop calculat ion guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . 25 11.1 transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 11.2 compensation procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 12 thermal measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 13 emi measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 14 board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 15 conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
AN4106 contents doc id 023156 rev 1 3/39 appendix a test equipment and measurement of effi ciency and light load performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 a.1 measuring input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 16 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
list of figures AN4106 4/39 doc id 023156 rev 1 list of figures figure 1. evlvip26l-12wfn demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. application schematic - complete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3. application schematic - simplified for v out 12 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 4. transformer size and pin diagram, bottom view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. transformer size, side view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6. transformer, pin distances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. transformer, electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. drain current and voltage at v in = 115 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. drain current and voltage at v in = 230 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. drain current and voltage at v in = 90 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. drain current and voltage at v in = 265 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 13. load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. output voltage ripple at v in = 115 v ac , full load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 15. output voltage ripple at v in = 230 v ac , full load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. output voltage ripple at v in =115v ac , no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. output voltage ripple at v in =230v ac , no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. output voltage ripple at v in =115v ac , i out = 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. output voltage ripple at v in =230v ac , i out = 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 20. active mode efficiency vs. v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 21. p in vs. v in at no load and light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. efficiency at p in = 1 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. p in at p out = 0.25 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 24. soft-start at startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. soft-start at startup (zoom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. output short-circuit applied: olp tripping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. output short-circuit maintained: olp steady-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 28. output short-circuit maintained: olp steady-state, zoom . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 29. output short-circuit removal and converter restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. feedback loop failure protection: tripping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. feedback loop failure protection: steady-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 32. feedback loop failure protection: steady-state, zoom . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 33. feedback loop failure removal: converter restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 34. control loop block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 35. thermal map at t amb = 25 c, v in = 85 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 36. thermal map at t amb = 25 c, v in = 115 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 37. thermal map at t amb = 25 c, v in = 230 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 38. background noise measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 39. average measurement at v in = 115 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 40. average measurement at v in = 230 v ac , full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 41. bottom layer & top overlay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 42. connections of the uut to the wattmeter for power measurements . . . . . . . . . . . . . . . . . 34 figure 43. switch in position 1 - setting for standby measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 44. switch in position 2 - setting for efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . 35
AN4106 list of tables doc id 023156 rev 1 5/39 list of tables table 1. electrical specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. bill of material (simplified schematic) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 3. transformer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 4. output voltage line-load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 5. output voltage ripple at half and full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 6. output voltage ripple at no/light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 7. no load input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 8. energy consumption criteria for no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 9. light load performance at p out = 25 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 10. light load performance at p out = 50 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 11. p out @ p in = 1 w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 12. key components temperature @ vin = 85 v ac /230 v ac , full load (t amb = 25 c) . . . . . 29 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
adapter features AN4106 6/39 doc id 023156 rev 1 1 adapter features the electrical specifications of the demonstration board are listed in ta b l e 1 . table 1. electrical specifications symbol parameter value v in input voltage range 90 v ac - 265 v ac v out output voltage 12 v i out max. output current 1 a vout_lf precision of output regulation 5% vout_hf high frequency output voltage ripple 50 mv t amb max. ambient operating temperature 60 oc
AN4106 circuit description doc id 023156 rev 1 7/39 2 circuit description the power supply is set in flyback topology. the complete schematic is given in figure 2 ; a simplified schematic for v out 12 v and the relevant bom are given in figure 3 and in ta b l e 2 respectively. the input section includes a resistor r1 and an ntc for inrush current limiting, a diode bridge (d0) and a pi filter for emc suppression (c1, l2, c2). the transformer core is a standard e20. a transil? clamp network (d1, d4) is used for leakage inductance demagnetization. the output voltage value is set in a simple way through the r3-r4 voltage divider between the output terminal and the fb pin, according to the following formula: equation 1 in fact, the fb pin is the input of an error amplifier and is an accurate 3.3 v voltage reference. in the schematic the resistor r4 has been split into r4a and r4b in order to allow better tuning of the output voltage value. the compensation network is connected between the comp pin (which is the output of the error amplifier) and the gnd pin and is made up of c7, c8 and r7. the output rectifier d3 has been selected according to the calculated maximum reverse voltage, forward voltage drop and power dissipation and is a power schottky type. a resistor has been connected between the lim and gnd pins in order to reduce the idlim to the value needed to supply the required output power, limiting the stress on the power components. at power-up the drain pin supplies the internal hv startup current generator which charges the vdd capacitor, c4, up to v ddon . at this point the power mosfet starts switching, the generator is turned off and the ic is powered by the energy stored in c4. if the nominal value of v out exceeds the v ddcson threshold of the viper26 by a small signal diode forward voltage drop, the ic can be supplied directly from the output selecting jumper j2 in figure 2 . in this case jumper j1 is open because the auxiliary winding of the transformer is not needed and the schematic can be simplified, as in figure 3 . since v ddcsonmax = 11.5 v, the minimum value of v out allowing this connection is 12 v. if v out < 12 v, the viper26 must be supplied through the auxiliary winding of the transformer (j1 selected, j2 open in figure 2 ), delivering to the v dd pin a voltage higher than v ddcson . the voltage generated by the auxiliary winding increases with the load on the regulated output. an external clamp (d5, r1) can be added in this case, in order to avoid the v dd operating range being exceeded. the figures and measurements in this document refer to a case in which v dd is supplied from the output, i.e. to the simplified schematic shown in figure 3 . ? ? ? ? ? ? + ? = 4 3 1 3 . 3 r r v v out
circuit description AN4106 8/39 doc id 023156 rev 1 figure 2. application schematic - complete r2 r7 j1 d5 r4 b r1 ntc c6 ic1 + c4 d1 d 3 + c10 + c1 ac in -+ d0 ac in l2 + c2 c7 c 8 + c11 r4 a r5 r 3 l1 + c12 c5 j2 3 6,7 8 ,9 5 t1 ground f vout d2 control fb drain gnd vdd comp lim viper26 c9 d6 1 2 d4 am11547v1 t
AN4106 circuit description doc id 023156 rev 1 9/39 figure 3. application schematic - simplified for v out 12 v am1154 8 v1 t ntc r7 r4b c6 + c4 d1 d3 + c10 ac in + c1 ac in -+ d0 l2 + c2 c7 c8 + c11 r4a r3 r5 c5 ground 3 6,7 8,9 5 t2 f vout control fb drain gnd vdd comp lim viper26 d6 1 3 d4
bill of material AN4106 10/39 doc id 023156 rev 1 3 bill of material table 2. bill of material (simplified schematic) reference part description manufacturer ntc 2.2 ntc ntc thermistor epcos f t2a 250v 2 a, 250 v ac fuse, tr5 series wickmann c1 10 f, 400 v nhg series electrolytic capacitor panasonic c2 22 f, 35 v smg series electrolytic capacitor panasonic c4 2.2 f, 63 v electrolytic capacitor c5 100 nf, 50 v ceramic capacitor c6 1 nf, 50 v ceramic capacitor c7 47 nf, 50 v ceramic capacitor c8 2.2 nf, 50 v ceramic capacitor c9 not mounted c10 1000 f, 16 v ultra low esr electrolytic capacitor zl series rubycon c11 680 f, 16 v ultra low esr electrolytic capacitor zl series rubycon c12 not mounted d0 df06m 1 a - 600 v diode bridge vishay d1 stth1l06 1 a - 600 v ultrafast diode st d2 not mounted d3 stps3150 3 a-150 v power schottky (output diode) st d4 1.5ke300a transil st d5 not mounted d6 1n4148 small signal diode fairchild r1 not mounted r2 not mounted r3 47k 1% 1/4 w resistor r4a 15k 1% 1/4 w resistor r4b 2.7k 1% 1/4 w resistor r5 33k 1/4 w resistor r7 3.3k 1/4 w resistor l1 short-circuit
AN4106 bill of material doc id 023156 rev 1 11/39 l2 rfb0807-102 input filter inductor (l=1 mh, i sat =0.3 a; dcr max =3.4 )coilcraft t1 1715.0049 60 khz switch mode transformer magnetica ic1 viper26ln high-voltage 60 khz pwm st j1 not mounted jumper j2 short-circuit jumper table 2. bill of material (simplified schematic) (continued) reference part description manufacturer
transformer AN4106 12/39 doc id 023156 rev 1 4 transformer the characteristics of the transformer are listed in the table below: the figures below show electrical diagram, size and pin distances (in mm) of the transformer. table 3. transformer characteristics parameter value test conditions manufacturer magnetica part number 1715.0049 primary inductance 1.6 mh 15% measured at 1 khz, t amb = 20 o c leakage inductance 0.74% measured at 10 khz, t amb = 20 o c primary to secondary turn ratio (3 - 5)/(6,7- 8,9) 5.89 5% measured at 10 khz, t amb = 20 o c primary to auxiliary turn ratio (3 - 5)/(1 - 2) 5.89 5% measured at 10 khz, t amb = 20 o c figure 4. transformer size and pin diagram, bottom view figure 5. transformer size, side view figure 6. transformer, pin distances figure 7. transformer, electrical diagram am11549v1 am11550v1 3 .5 min 1 8 max am11551v1 am11552v1
AN4106 testing the board doc id 023156 rev 1 13/39 5 testing the board 5.1 typical waveforms drain voltage and current waveforms in full load condition are shown for the two nominal input voltages in figure 8 and 9 , and for minimum and maximum input voltage in figure 10 and 11 respectively. figure 8. drain current and voltage at v in = 115 v ac , full load figure 9. drain current and voltage at v in = 230 v ac , full load am1155 3 v1 am11554v1 figure 10. drain current and voltage at v in =90 v ac , full load figure 11. drain current and voltage at v in = 265 v ac , full load am11555v1 am11556v1
line/load regulation and output voltage ripple AN4106 14/39 doc id 023156 rev 1 6 line/load regulation and output voltage ripple the output voltage of the board has been measured in different line and load condition. the results are shown in ta b l e 4 . the output voltage is practically not affected by the line condition. the ripple at the switching frequency superimposed at the output voltage has also been measured and the results are reported in ta bl e 5 . table 4. output voltage line-load regulation v in [v ac ] v out no load 50% load 75% load 100% load 90 12.18 12.16 12.17 12.19 115 12.18 12.17 12.17 12.19 150 12.18 12.17 12.18 12.18 180 12.18 12.17 12.18 12.18 230 12.18 12.18 12.18 12.17 265 12.18 12.18 12.18 12.18 figure 12. line regulation figure 13. load regulation vo u t[v] v in [v ac ] am11557v1 11.9 12 12.1 12.2 12. 3 8 0 105 1 3 01551 8 02052 3 0255 0 25 % 50 % 75 % 100 % am1155 8 v1 11.9 12 12.1 12.2 12. 3 0 0.1 0.2 0. 3 0.4 0.5 0.6 0.7 0. 8 0.9 1 1.1 vo u t[v] io u t[a] 90 115 2 3 0 265
AN4106 line/load regulation and output voltage ripple doc id 023156 rev 1 15/39 table 5. output voltage ripple at half and full load v in [v ac ] v out (mv) half load full load 90 17 23 115 16 21 230 18 25 265 17 24 figure 14. output voltage ripple at v in =115v ac , full load figure 15. output voltage ripple at v in = 230 v ac , full load am11559v1 am11560v1
burst mode and output voltage ripple AN4106 16/39 doc id 023156 rev 1 7 burst mode and output voltage ripple when the converter is lightly loaded, the comp pin voltage decreases. as it reaches the shutdown threshold, v compl (1.1 v, typical), the switching is disabled and no more energy is transferred to the secondary side. so, the output voltage decreases and the regulation loop makes the comp pin voltage increase again. as it rises 40 mv above the v compl threshold, the normal switching operation is resumed. this results in a controlled on/off operation (referred to as ?burst mode?) as long as the output power is so low that it requires a turn-on time lower than the minimum turn-on time of the viper26. this mode of operation keeps the frequency-related losses low when the load is very light or disconnected, making it easier to comply with energy-saving regulations. the figures below show the output voltage ripple when the converter is no/lightly loaded and supplied with 115 v ac and with 230 v ac respectively. figure 16. output voltage ripple at v in =115v ac , no load figure 17. output voltage ripple at v in = 230 v ac , no load am11561v1 am11562v1 figure 18. output voltage ripple at v in =115v ac , i out = 25 ma figure 19. output voltage ripple at v in = 230 v ac , i out = 25 ma am1156 3 v1 am11564v1
AN4106 burst mode and output voltage ripple doc id 023156 rev 1 17/39 ta b l e 6 shows the measured value of the burst mode frequency ripple measured in different operating conditions. the ripple in burst mode operation is very low. table 6. output voltage ripple at no/light load v in [v ac ] v out [mv] no load 25 ma load 90 2 3 115 2 3 230 2 4 265 3 4
efficiency AN4106 18/39 doc id 023156 rev 1 8 efficiency the active mode efficiency is defined as the average of the efficiencies measured at 25%, 50%, 75% and 100% of maximum load, at nominal input voltage (v in = 115 v ac and v in = 230 v ac ). external power supplies (the power supplies which are contained in a separate housing from the end-use devices they are powering) need to comply with the code of conduct, version 4 "active mode efficiency" criterion, which states an active mode efficiency higher than 77.7% for a power throughput of 12 w. another standard to be applied to external power supplies in the coming years is the doe (department of energy) recommendation, whose active mode efficiency requirement for the same power throughput is 82.96%. the presented demonstration board is compliant with both standards, as can be seen from figure 20, where the average efficiencies of the board at 115 v ac (87%) and at 230 v ac (86.7%) are plotted with dotted lines, together with the above limits. in the same figure the efficiency at 25%, 50%, 75% and 100% of load for both input voltages is also shown. figure 20. active mode efficiency vs. v in am11567v1 75 77 79 8 1 83 8 5 8 7 0.2 0.4 0.6 0. 8 1 eff [ % ] io u t[a] y 115 2 3 0 a v @ 115 v a c a v @ 2 3 0 v a c doe limit coc4 limit
AN4106 light load performance doc id 023156 rev 1 19/39 9 light load performance the input power of the converter has been measured in no load condition for different input voltages and the results are reported in ta b l e 7 . in version 2.0 of the code of conduct, version 4 program the power consumption of the power supply when it is not loaded is also considered. the criteria for compliance are given in the table below: table 8. energy consumption criteria for no load the power consumption of the presented board is about ten times lower than the code of conduct, version 4 limit. even if this performance seems to be disproportionally better than the requirements, it is worth noting that often ac-dc adapter or battery charger manufacturers have very strict requirements about no load consumption and when the converter is used as an auxiliary power supply, the line filter is often the main line filter of the entire power supply which considerably increases standby consumption. even if the code of conduct, version 4 program does not have other requirements regarding light load performance, in order to give more information the input power and efficiency of the demonstration board also in two other light load cases is shown. ta bl e 9 and ta b l e 1 0 show the performances when the output load is 25 mw and 50 mw respectively. table 7. no load input power v in [v ac ]p in [mw] 90 12.8 115 13.6 150 15.0 180 16.6 230 19.9 265 22.9 nameplate output power (pno) maximum power in no load for ac-dc eps 0 w p no 50 w < 0.3 w 50 w < p no < 250 w < 0.5 w table 9. light load performance at p out = 25 mw v in [v ac ]p out [mw] p in [mw] efficiency (%) 90 25 47.2 53.0 115 25 48.7 51.4 150 25 51.2 48.7 180 25 54.4 45.9 230 25 59.2 42.2 265 25 65.0 38.5
light load performance AN4106 20/39 doc id 023156 rev 1 the input power vs. input voltage for no load and light load condition ( ta b l e 7 , 9 and 10 ) are shown in the figure below. figure 21. p in vs. v in at no load and light load depending on the equipment supplied, it?s possible to have several criteria to measure the standby or light load performance of a converter. one criterion is the measurement of the output power when the input power is equal to one watt. in ta b l e 1 1 the output power needed to have 1 w of input power in different line conditions is given. figure 22 shows the output power corresponding to p in = 1 w for different values of the input voltage. table 10. light load performance at p out = 50 mw v in [v ac ]p out [mw] p in [mw] efficiency (%) 90 50 76.4 65.4 115 50 78.4 63.8 150 50 81.7 61.2 180 50 85.1 58.7 230 50 91.6 54.6 265 50 98.0 51.0 table 11. p out @ p in = 1 w v in [v ac ]p in (w) p out (w) efficiency (%) 90 1 0.837 83.7 115 1 0.827 82.7 150 1 0.826 82.6 am11570v1 0 25 50 75 100 125 150 175 200 8 01051 3 01551 8 02052 3 0255 pin [mw] vin [v ac ] 0 25mw 50mw
AN4106 light load performance doc id 023156 rev 1 21/39 figure 22. efficiency at p in = 1 w another requirement (eup lot 6) is that the input power should be less than 500 mw when the converter is loaded with 250 mw. the converter can satisfy even this requirement, as shown in figure 23 . figure 23. p in at p out = 0.25 w 180 1 0.801 80.1 230 1 0.766 76.6 265 1 0.753 75.3 table 11. p out @ p in = 1 w v in [v ac ]p in (w) p out (w) efficiency (%) am11571v1 50 55 60 65 70 75 8 0 8 5 90 8 0 110 140 170 200 2 3 0260 eff [ % ] v in [v ac ] am11571v2 0.25 0. 3 0. 3 5 0.4 0.45 0.5 8 0 110 140 170 200 2 3 0260 p in [w] vin[v]
functional check AN4106 22/39 doc id 023156 rev 1 10 functional check 10.1 soft-start at startup the current limitation value reaches idlim after an internally set time, t ss , whose typical value is 8.5 msec. this time is divided into 16 time intervals, each corresponding to a current limitation step progressively increasing. in this way the drain current is limited during the output voltage increase, therefore reducing the stress on the secondary diode. the soft- start phase is shown in figure 24 and 25 . 10.2 overload protection in case of overload or short-circuit (see figure 26 ), the drain current reaches the idlim value (or the one set by the user through the rlim resistor). every cycle that this condition is met, a counter is incremented. if the fault is maintained continuously for the time t ovl (50 msec typical, set internally), the overload protection is tripped, the power section is turned off and the converter is disabled for a t restart time (1 s typical). after this time has elapsed, the ic resumes switching and, if the short is still present, the protection occurs indefinitely in the same way ( figure 27 ). this ensures restart attempts of the converter with low repetition rate, so that it works safely with extremely low power throughput and avoids overheating of the ic in case of repeated overload events. moreover, every time the protection is tripped, the internal soft-start function ( figure 25 ) is invoked, in order to reduce the stress on the secondary diode. after the short removal, the ic resumes working normally. if the short is removed during t ss or t ovl , i.e. before the protection tripping, the counter is decremented on a cycle-by-cycle basis down to zero and the protection is not tripped. if the short-circuit is removed during t restart , the ic waits for the t restart period to elapse before resuming switching ( figure 29 ). figure 24. soft-start at startup figure 25. soft-start at startup (zoom) am11572v1 am1157 3 v1
AN4106 functional check doc id 023156 rev 1 23/39 10.3 feedback loop failure protection as the loop is broken (r4 = r4a+r4b shorted or r3 open), the output voltage v out increases and the viper26 runs at its maximum current limitation. the v dd pin voltage increases as well, because it is linked to the v out voltage either directly or through the auxiliary winding, depending on the cases. if the v dd voltage reaches the v ddclamp threshold (23.5 v min.) in less than 50 msec, the ic is shut down by open loop failure protection (see figure 30 and 31 ), otherwise by olp, as described in the previous section. the breaking of the loop has been simulated by shorting the low-side resistor of the output voltage divider, r4 = r4a+r4b. the same behavior can be induced opening the high-side resistor, r3. figure 26. output short-circuit applied: olp tripping figure 27. output short-circuit maintained: olp steady-state figure 28. output short-circuit maintained: olp steady-state, zoom figure 29. output short-circuit removal and converter restart am11574v1 o u tp u t i s s horted here norm a l oper a tion am11575v1 t restart am11576v1 t ovl t ss am11577v1 o u tp u t s hort i s removed here t re s tart norm a l oper a tion
functional check AN4106 24/39 doc id 023156 rev 1 the protection acts in auto-restart mode with t restart = 1 s ( figure 31 ). as the fault is removed, normal operation is restored after the last t restart interval has been completed ( figure 33 ). figure 30. feedback loop failure protection: tripping figure 31. feedback loop failure protection: steady-state am1157 8 v1 norm a l oper a tion < t ovl f au lt i s a pplied here v dd re a che s v ddclamp am11579v1 t restart figure 32. feedback loop failure protection: steady-state, zoom figure 33. feedback loop failure removal: converter restart am115 8 0v1 < t ovl am115 8 1v1 t restart fault is removed here normal o p eration
AN4106 feedback loop calculation guidelines doc id 023156 rev 1 25/39 11 feedback loop calculation guidelines 11.1 transfer function the set pwm modulator + power stage is indicated with g1(f), while c(f) is the ?controller?, i.e. the network which is in charge to ensure the stability of the system. figure 34. control loop block diagram the mathematical expression of the power plant g1(f) is the following: equation 2 where v out is the output voltage, ipkp is the primary peak current, fp is the frequency of the pole due to the output load: equation 3 and fz the frequency of the zero due to the esr of the output capacitor: equation 4 the mathematical expression of the compensator c(f) is: am115 8 2v1 ) fp j (1 ) , ( ) fz (1 v ) p 2 j (1 ) , ( ) z 2 (1 v = i v (f) g out ou t pk out 1 f vdc fsw ipkp f j f vdc fsw ipkp f j ? + ? ? + ? = ? ? ? + ? ? ? ? + ? = 2esr) + (r c 1 fp out out ? = esr c 2 1 fz ou t ? ? =
feedback loop calculation guidelines AN4106 26/39 doc id 023156 rev 1 equation 5 where (with reference to the schematic of figure 2 ): equation 6 equation 7 equation 8 are to be chosen with the purpose to ensure the stability of the overall system. gm = 2 ma/v (typical) is the viper26 transconductance. 11.2 compensation procedure the first step is to choose the pole and zero of the compensator and the crossover frequency, for instance: fzc = fp/2 fpc = fz fcross = fcross_sel fsw/10. g1(fcross_sel) can be calculated from equation (2) and, being by definition | c(fcross_sel)*g1(fcross_sel) | = 1, c 0 can be calculated as follows: equation 9 at this point the bode diagram of g1(f)*c(f) can be plotted, in order to check the phase margin for the stability. if the margin is not high enough, another choice should be made for () ? ? ? ? ? ? ? ?? + ? ? ? ? ? + ? = = fp c j f j f fz c j f h c v i f c comp 1 2 1 0 out pk 4 3 4 8 7 0 r r r c c gm c + ? + ? = 7 7 2 1 c r fzc ? ? ? = 8 7 7 2 8 7 c c r c c fpc ? ? ? ? + = ) _ ( 1 _ 1 _ 1 _ 2 0 sel fcross g h fzc j sel fcross fpc j sel fcross j sel fcross c comp ? ? + ? + ? ? ? ? =
AN4106 feedback loop calculation guidelines doc id 023156 rev 1 27/39 fzc, fpc and fcross_sel, and the procedure repeated. when the stability is ensured, the next step is to find the values of the schematic components, which can be calculated, using the above formulas, as follows: equation 10 equation 11 equation 12 equation 13 1 3 . 3 6 5 ? = v v r r out 3 4 4 8 0 r r r c gm fpc fzc c + ? ? = ? ? ? ? ? ? ? ? ? ? = 1 8 7 fzc fpc c c 8 7 2 8 7 7 c c fpc c c r ? ? ? ? + =
thermal measurements AN4106 28/39 doc id 023156 rev 1 12 thermal measurements a thermal analysis of the board at full load condition, @ t amb = 25 c has been performed using an ir camera. the worst case is v in = 85 v ac , but also the nominal input voltage cases (v in = 115 v ac and v in = 230 v ac ) have been considered. the results are shown in figure 35 , 36 and 37 and summarized in ta b l e 1 2 . figure 35. thermal map at t amb = 25 c, v in = 85 v ac , full load figure 36. thermal map at t amb = 25 c, v in = 115 v ac , full load am115 83 v1 am115 8 4v1
AN4106 thermal measurements doc id 023156 rev 1 29/39 figure 37. thermal map at t amb = 25 c, v in = 230 v ac , full load am115 8 5v1 table 12. key components temperature @ v in = 85 v ac /230 v ac , full load (t amb = 25 c) point t [ c ] reference v in = 85 v ac v in = 230 v ac a 72.2 55.2 viper26 b 66.6 63.4 output diode c 46.6 46.4 transformer d 51.5 34.9 diode bridge e 50.0 32.6 thermistor f 41.9 33.4 transil
emi measurements AN4106 30/39 doc id 023156 rev 1 13 emi measurements a pre-compliance test to en55022 (class b) european normative has been performed using an emc analyzer and an lisn. first of all, a measurement of the background noise (board disconnected from the mains) was performed and is reported in figure 38 . then the average emc measurements at 115 v ac /full load and 230 v ac /full load were performed and the results are shown in figure 39 and 40 . figure 38. background noise measurement figure 39. average measurement at v in = 115 v ac , full load
AN4106 emi measurements doc id 023156 rev 1 31/39 figure 40. average measurement at v in = 230 v ac , full load
board layout AN4106 32/39 doc id 023156 rev 1 14 board layout here below the board layout: figure 41. bottom layer & top overlay
AN4106 conclusions doc id 023156 rev 1 33/39 15 conclusions the viper26 allows a simple design of a non-isolated converter with few external components. in this document a non-isolated flyback has been described and characterized. special attention has been given to light load performance, confirmed as very good by bench analysis. efficiency has been compared to the requirements of the code of conduct, version 4 program (version 2.0) for an external ac-dc adapter with very good results in that the measured active mode efficiency is always higher with respect to the minimum required.
test equipment and measurement of efficiency and light load performance AN4106 34/39 doc id 023156 rev 1 appendix a test equipment and measurement of efficiency and light load performance the converter input power has been measured using a wattmeter. the wattmeter measures simultaneously the converter input current (using its internal ammeter) and voltage (using its internal voltmeter). the wattmeter is a digital instrument so it samples the current and voltage and converts them to digital forms. the digital samples are then multiplied giving the instantaneous measured power. the sampling frequency is in the range of 20 khz (or higher depending on the instrument used). the display provides the average measured power, averaging the instantaneous measured power in a short period of time (1 sec typ.). figure 42 shows how the wattmeter is connected to the uut (unit under test) and to the ac source and the wattmeter internal block diagram. figure 42. connections of the uut to the wattmeter for power measurements an electronic load has been connected to the output of the power converter (uut), allowing the converter load current to be set and measured, while the output voltage has been measured by a voltmeter. the output power is the product between load current and output voltage. the ratio between the output power, calculated as previously stated, and the input power, measured by the wattmeter, is the converter?s efficiency, which has been measured in different input/output conditions. a.1 measuring input power with reference to figure 42 , the uut input current causes a voltage drop across the ammeter?s internal shunt resistance (the ammeter is not ideal as it has an internal resistance higher than zero) and across the cables connecting the wattmeter to the uut. if the switch of figure 42 is in position 1 (see also the simplified scheme of figure 43 ), this voltage drop causes an input measured voltage higher than the input voltage at the uut input that, of course, affects the measured power. the voltage drop is generally negligible if the uut input current is low (for example when we are measuring the input power of uut in light load condition). a v display x avg watt meter 1 2 ac source u.u.t (unit under test) input multiplier voltmeter ammeter output + switch am11590v1
AN4106 test equipment and measurement of efficiency and light load performance doc id 023156 rev 1 35/39 figure 43. switch in position 1 - setting for standby measurements in the case of high uut input current (i.e. for measurements in heavy load conditions), the voltage drop can be relevant compared to the uut real input voltage. if this is the case, the switch in figure 42 can be changed to position 2 (see simplified scheme of figure 44 ) where the uut input voltage is measured directly at the uut input terminal and the input current does not affect the measured input voltage. figure 44. switch in position 2 - setting for efficiency measurements on the other hand, the position of figure 44 may introduce a relevant error during light load measurements, when the uut input current is low and the leakage current inside the voltmeter itself (which is not an ideal instrument and doesn't have infinite input resistance) is not negligible. this is the reason why it is better to use the setting of figure 43 for light load measurements and figure 44 for heavy load measurements. if it is not clear which measurement scheme has the lesser effect on the result, try with both and register the lower input power value. as noted in iec 62301, instantaneous measurements are appropriate when power readings are stable. the uut is operated at 100% of nameplate output current output for at least 30 v + - a ~ ac source uut u.u.t. ac input voltmeter ammeter wattmeter am11591v1 am11592v1 v + - ~ ac source uut u.u.t. ac input voltmeter ammeter a wattmeter
test equipment and measurement of efficiency and light load performance AN4106 36/39 doc id 023156 rev 1 minutes (warm-up period) immediately prior to conducting efficiency measurements. after this warm-up period, the ac input power is monitored for a period of 5 minutes to assess the stability of the uut. if the power level does not drift by more than 5% from the maximum value observed, the uut can be considered stable and the measurements can be recorded at the end of the 5-minute period. if ac input power is not stable over a 5-minute period, the average power or accumulated energy is measured over time for both ac input and dc output. some wattmeter models allow integration of the measured input power in a time range and then measure the energy absorbed by the uut during the integration time. the average input power is calculated dividing by the integration time itself.
AN4106 references doc id 023156 rev 1 37/39 16 references ? code of conduct on energy efficiency of external power supplies, version 4. ? viper26 datasheet.
revision history AN4106 38/39 doc id 023156 rev 1 17 revision history table 13. document revision history date revision changes 16-oct-2012 1 initial release.
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